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Title of Thesis
PAPR Reduction in OFDM System |
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Author(s)
Seema Khalid |
Institute/University/Department
Details Department Of Electrical And Computer
Engineering, Centre For Advanced Studies In Engineering / University
Of Engineering And Technology, Taxila |
Session 2010 |
Subject Communication / Digital Signal
Processing |
Number of Pages 105 |
Keywords (Extracted from title, table of contents and
abstract of thesis) Computational, System, Solution,
Deficiencies, Reduction, Architectures, Capacity, Prototype,
Programmable, Minimal, Constrain |
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Abstract One of the major
drawbacks of OFDM has been the high peak-to-average power ratio (PAPR)
that is characteristic of signals with multiple sub-carriers.The
high PAPR requires additional back off to achieve linear
amplification at the transmitter end which results in inefficient
power consumption.This inefficient power consumption is the major
impediment in implementing OFDM in portable device. Previous efforts
to address this problem have been principally directed at two areas,
the reduction of signal PAPR and various methods of achieving linear
and efficient power amplification (PA).However, all approaches
suffer due to various deficiencies such as complexity, computational
time, memory requirements,data rate loss and high
distortion.Therefore, this thesis aimed at finding the solution of
power control problem by reducing the PAPR of the signal. Two novel
techniques are proposed in this thesis. One of the techniques is
based on distortion class named as Zero Forcing Peaks (ZFP) and the
other is based on Selected Mapping (SLM) technique fromprobabilistic
class. In this thesis a new concept of using Learning Vector
Quantization (LVQ) along with SLM has been introduced which is named
as LVQ-SLM and can be considered as a major contribution of this
thesis. Further two different architectures are proposed for LVQ-SLM
and their practicability is investigated by synthesizing these
architectures on Field Programmable Gate Arrays FPGA.
Result obtained using second technique is quite encouraging. An
efficient implementation of SLM is achieved by using LVQ network as
it reduces PAPR with minimal computational complexity. The only
constrain which has been noted when the number of sub carriers and
modulation order increase, the on-chip memory to store prototype
vectors and computational requirements also increase.High capacity
low power Content addressable memory (CAMs) based hardware can be
used to solve this constrain which has also been proposed in this
thesis. |
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